FPGA-Based CNN Accelerator for Medical Image Classification

This project implements a convolutional neural network (CNN) for binary medical image classification directly on a field-programmable gate array (FPGA) using register-transfer level (RTL) Verilog design. The target platform is the Nexys A7-100T FPGA board. The CNN architecture consists of two convolutional layers with ReLU activation and max pooling, followed by a fully connected classification layer. All layers are implemented as synthesizable Verilog hardware modules operating on 64x64 grayscale medical images from the PneumoniaMNIST dataset, a benchmark chest X-ray dataset for pneumonia detection. Model weights are trained in PyTorch, quantized to 8-bit fixed-point precision, and exported directly into the hardware design. Performance metrics including inference latency and resource utilization are compared against a CPU software baseline to evaluate the efficiency gains of hardware acceleration for medical imaging workloads.